Fin field-effect transistor (FinFET) devices include a transistor architecture that uses raised source-to-drain channel regions, referred to as fins. A FinFET device can be built on a semiconductor substrate, where a semiconductor material, such as silicon, is patterned into a fin-like shape and functions as the channel of the transistor.
Semiconductor devices, such as, for example, complementary metal-oxide semiconductor (CMOS) FinFET devices are continuously being scaled down to smaller dimensions. As components are scaled down and devices are being formed closer together, improved processing for forming fin structures is needed. For example, when using a hardmask pattern to form fins in a substrate, due to micro-loading etching effects, fins on the ends of a pattern of fins formed in a substrate will have a different dimension (e.g., lateral width) from inner fins of the pattern. The difference in critical dimension is due to the end fins having different environments than the inner fins, such as isolation regions, on their outer sides.
In some cases, the end fins will be wider than the middle fins, and in other cases the end fins may be narrower than the middle fins. In either case, there exists an undesirable non-uniformity between the critical dimensions of the end fins with respect to the inner (or middle) fins when forming fins with hardmask patterns.